Digital Integrated Circuits (VLSI) - Hebrew Lectures

Hebrew Name: מבוא למעגלים משולבים

BIU Course Number: 83-313

Lecturer: Prof. Adam Teman

1. Introduction, Digital Design

Section 1a-1b: The World of Chip Design

Section 1c: How a Chip is Born

Supplementary Material:

Kahoot for Lecture 1 (English)

2. The Manufacturing Process

Section 2a: A Process Primer

Section 2c: Process Variations

Section 2b: Detailed Process Flow

Section 2d: Manufacturing Issues

Supplementary Material:

Kahoot for Lecture 2 (English)

3. MOSFET Modeling

Section 3a-3b: MOS Models

Section 3c: Threshold Voltage Revisited

Section 3b: Advanced MOS Models

Section 3e: Leakage in NanoScaled Transistors

Note: No Section 3d in Hebrew

Supplementary Material:

Kahoot for Lecture 3 – Sections a-d (English)

Kahoot for Lecture 3 – Sections e (English)

4. Design Metrics

Section 4b: Design Metrics Reminder

Section 4c: Cost of an Integrated Circuit

Supplementary Material:

Kahoot for Lecture 4 (English)

5. Scaling and The NanoScaled MOSFET

Section 5a: Moore’s Law

Section 5c: The NanoScaled Transistor

Section 5b: Scaling Models

Section 5d: Current and Future Trends

Supplementary Material:

Kahoot for Lecture 5 (English)

6. Interconnect

Section 6a: Intro

Section 6c: Resistance

Section 6e: Wire Scaling

Section 6b: Capacitance

Section 6d: Interconnect Modeling

Supplementary Material:

Kahoot for Lecture 6 (English)

7. Sequential Logic

Section 7a: Sequential Logic – Motivation

Section 7c: Timing Parameters

Section 7e: Basic Timing Constraints

Section 7b: Sequential Logic Elements

Section 7d: Other Flip Flop Implementations

Section 7f: Static Timing Analysis Example

Supplementary Material:

Kahoot for Lecture 7 (English)

8. SRAM

Section 8a: SRAM – Introduction

Section 8c: 6T SRAM Operation

Section 8f: SNM Calculation

Section 8b and 8d: The 6T SRAM Bitcell and Layout

Section 8e: SRAM Stability

Supplementary Material:

Kahoot for Lecture 8 (English)

9. Memory Peripherals

Section 9a: SRAM Peripherals – Overview

Section 9c: Column Decoder and Sense Amplifiers

Section 9b: Row Decoder Design

Supplementary Material:

Kahoot for Lecture 9 (English)

10. Arithmetic Circuits

Section 10a: Intro – Basic Addition

Section 10c: Basic Multiplication

Section 10e: Faster Multiplication

Section 10b: Fast Adders

Section 10d: Booth Recoding

Supplementary Material:

Kahoot for Lecture 10 – Sec a-b (English)

Kahoot for Lecture 10 – Sec c-e (English)

11. Other Memories

Lecture 11: Other Memories

Note: The English version of this lecture is much more extended

Supplementary Material:

VLSI – Kahoot for Lecture 11 (English)

12. Technology and Standard Cell Layout

Lecture 12a (Appendix):
Layout and Design Rules

Lecture 12c (Appendix):
Basic Layout Planning

Lecture 12b (Appendix):
Standard Cell Layout

Note: This appendix is only available in the Hebrew version

Supplementary Material: