International hybrid conference by
The Israeli RISC-V Consortium
Participation is possible by arriving at the Bar Ilan University venue, or by joining the virtual conference using the link that will be provided to you after registration.
The Israeli Innovation Authority and the GenPro consortium are inviting you to attend a unique technological conference on RISC-V technology. The conference will include presentations on various RISC-V related topics, presented by consortium members and leading keynote speakers from the industry (see below).
Wednesday
November 17th, 2021
14:00-20:00
Israel Time
At Bar Ilan University,
the faculty of Engineering.
Participation in the conference is free of charge but requires pre-registration.
Registration is now available for online participation only
As established by Israel Ministry of Health guidelines,
entry onto BIU campus is permitted by presenting the new ‘green pass’ only.
Everyone entering the campus gates must present an official photo ID.
As per Ministry of Health guidelines, masking is required in closed spaces,
including in classrooms.
Due to COVID19 restrictions, the number of physically participants is limited.
Towards the conference date we will send you and email which will approve your
physically participation or sending you a link to online participation (zoom).
About the
GenPro Consortium
The GenPro consortium was established by the Israel Innovation Authority (IIA), as part of the MAGNET program. GenPro was granted a funding period of 3 years of R&D activity, starting in October 2018. GenPro members are both leading Israeli high-tech companies as well as top academic VLSI researchers from leading Israeli academic research institutes. The leading company is Mellanox-NVIDIA and the other members are Western Digital (WD), Ceva, Satixfy, and DSPG.
The consortium is developing an innovative computing platform that is based on the open-source RISC-V foundation CPU technology. The GenPro platform is used by the member companies in their current and future products. Some of the GenPro technologies are open for other Israeli companies to use. The platform includes a performance-oriented RISC-V core and an embedded low power core as well as innovative memory interface and management technologies and advanced hardware acceleration technologies.
Prof. Luca Benini
Chair of digital Circuits and systems at ETHZ and is Full Professor at the Universita di Bologna
Extreme Energy Efficiency for Extreme Edge AI Acceleration a RISC-V platform design perspective
The next wave of pervasive AI pushes machine learning (ML) acceleration toward the extreme edge, with mW power budgets, while at the same time it raises the bar in terms of accuracy and capabilities, with new ML models being propose on a daily basis. To succeed in this balancing act, we need principled ways to walk the line between flexible and highly specialized ML acceleration architectures. In this talk I will detail on how to walk the line, drawing from the experience of the open PULP (parallel ultra-low power) platform, based on ML-enhanced RISC-V processors coupled with domain-specific acceleration engines.
Luca Benini holds the chair of digital Circuits and systems at ETHZ and is a Full Professor at the Universita di Bologna. He received a Ph.D. from Stanford University. He has been visiting professor at Stanford University, IMEC, EPFL. He served as chief architect in STMicroelectronics France. Dr. Benini’s research interests are in energy-efficient parallel computing systems, smart sensing micro-systems, and machine learning hardware. He has published more than 1000 peer-reviewed papers and five books. He is an ERC-advanced grant winner, a Fellow of the IEEE, of the ACM, and a member of the Academia Europaea. He is the recipient of the 2016 IEEE CAS Mac Van Valkenburg Award, the 2019 IEEE TCAD Donald O. Pederson Best Paper Award, and the ACM/IEEE A. Richard Newton Award 2020.
Dror Goldenberg
SVP Software Architecture at NVIDIA
RISC-V takes network programmability to the next level
Dror joined NVIDIA in 2020 as part of the Mellanox acquisition. He joined Mellanox as an architect in 2000 to work on exciting network innovations. Dror drove silicon and system architecture of multiple generations of NICs, Switches and SoCs. Dror’s main focus nowadays is on software architecture, enabling network accelerations of cool technologies like artificial intelligence, HPC, cloud, storage, big data, security and more. He has organized more than a dozen Hackathons and is passionate about innovations. Dror holds several patents in the field of high speed networking. He graduated Cum Laude with a B.Sc. in Electrical Engineering and holds an MBA from the Technion Institute of Technology Israel.
Dr. Zvonimir Bandic
Senior Director, Next Generation Platform Technologies at Western Digital , Member BoD at RISC-V foundation, Chairman of the BoD at CHIPS Alliance
RISC-V market update and Chips Alliance
RISC-V Instruction Set Architecture has grown almost 20-fold in adoption and membership in the period between 2015 and 2021.
Starting from its original academic roots, it has grown into potentially most significant computer architecture standard of 21st century.
Adoption of RISC-V ISA in multiple markets, from IoT on one end, all the way to automotive and datacenter is only matter
of time and software ecosystem readiness. RISC-V ISA has also enabled open source hardware projects on a scale
that was not possible with proprietary standards. On the shoulders on RISC-V ISA another organization, CHIPS Alliance,
emerged and grown into one of largest open source hardware efforts. We will review several exciting open source
hardware projects in CHIPS alliance and present accomplishments of 2021.
Zvonimir Z. Bandić is a research staff member and senior director of Next Generation Platform Technologies at Western Digital Corporation in San Jose, Calif. He received his Bachelor of Science in electrical engineering in 1994 from the University of Belgrade, Yugoslavia, and his Master of Science (1995) and Ph.D. (1999) in applied physics from Caltech, Pasadena, in the field of novel electronic devices based on wide bandgap semiconductors. He is currently focusing on both NAND and emerging Non-Volatile Memories (PCM, ReRAM, MRAM) applications for data center storage and computing, including CPU, memory, networking, and storage. He has been awarded over 50 patents in the fields of solid-state electronics, solid-state disk controller technology, security architecture, and storage systems and has published over 50 peer-reviewed papers.
Program
Networking and Demonstrations
Opening Remarks, Mr. Dror Bin CEO of the Israel Innovation Authority
About the GenPro Consortium:
• GenPro activity and achievement, Mr. Natty Buhbut, GenPro Chairmen, NVIDIA
• The GenPro Chip, Mr. Yehuda Rudin, ENICS laboratory, Bar Ilan University
Efficient Issue Scheduling for Hardware Multithreaded RISC-V pipeline, Dr. Shlomo Greenberg, BGU
Intermission
Using the RI5CY core in a chip, DSPG
Keynote – Extreme Energy Efficiency for Extreme Edge AI Acceleration a RISC-V platform design perspective, Prof. Luca Benini
It’s alive – Software Development Kit for Pulpinex; image load, compiling, debugging, and more…,Ofer Shinaar , WD
Intermission
Keynote – RISC-V takes network programmability to the next level, Dror Goldenberg, SVP Software Architecture at NVIDIA
Keynote – “RISC-V market update and Chips Alliance”, Dr. Zvonimir Z. Bandić
Dinner
Conference attendees
Conference by
The Israeli RISC-V Consortium
Wednesday 17th November, 2021
At Bar Ilan University, the faculty of Engineering
14:00-20:00 including Dinner
The countdown has begun
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Registration form
Registration is now available for online participation only
As established by Israel Ministry of Health guidelines, entry onto BIU campus is permitted by presenting the new ‘green pass’ only.
Everyone entering the campus gates must present an official photo ID.
As per Ministry of Health guidelines, masking is required in closed spaces, including in classrooms.
Due to COVID19 restrictions, the number of physically participants is limited.
Towards the conference date we will send you and email which will approve your physically participation or sending you a link to online participation (zoom).